21 research outputs found

    Fast speculative address generation and way caching for reducing L1 data cache energy

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    L1 data caches in high-performance processors continue to grow in set associativity. Higher associativity can significantly increase the cache energy consumption. Cache access latency can be affected as well, leading to an increase in overall energy consumption due to increased execution time. At the same time, the static energy consumption of the cache increases significantly with each new process generation. This paper proposes a new approach to reduce the overall L1 cache energy consumption using a combination of way caching and fast, speculative address generation. A 16-entry way cache storing a 3-bit way number for recently accessed L1 data cache lines is shown sufficient to significantly reduce both static and dynamic energy consumption of the L1 cache. Fast speculative address generation helps to hide the way cache access latency and is highly accurate. The L1 cache energy-delay product is reduced by 10% compared to using the way cache alone and by 37% compared to the use of multiple MRU technique.Peer ReviewedPostprint (published version

    Euler structures, the variety of representations and the Milnor-Turaev torsion

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    In this paper we extend and Poincare dualize the concept of Euler structures, introduced by Turaev for manifolds with vanishing Euler-Poincare characteristic, to arbitrary manifolds. We use the Poincare dual concept, co-Euler structures, to remove all geometric ambiguities from the Ray-Singer torsion by providing a slightly modified object which is a topological invariant. We show that when the co-Euler structure is integral then the modified Ray-Singer torsion when regarded as a function on the variety of generically acyclic complex representations of the fundamental group of the manifold is the absolute value of a rational function which we call in this paper the Milnor-Turaev torsion.Comment: This is the version published by Geometry & Topology on 16 September 200

    Pharynx Reconstruction and Quality of Life

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    Patients who are diagnosed with squamous cell carcinoma of the pharynx have a first delayed presentation, with advanced stages of the disease. Therefore, they frequently require a multimodal approach—by surgery, radio, and chemotherapy. Due to anatomic spatial limits and particularities, therapy can imply large organ resection with difficulties in reconstruction. Nowadays, there is a paradigm shift in the management of this pathology, with significant first referral to oncology departments and initiation as the first line of treatment of radio/radio-chemotherapy. As a consequence, salvage surgery may be mandatory in some selected cases. The proposed chapter will address the oncological particularities of the pharynx, with a focus on the oro- and hypopharynx, ways of reconstruction after oncological ablative surgery of these segments, and impact on quality of life (QoL) index. Speech, respiratory, and deglutition rehabilitation of these patients is essential and will be a distinct topic. This paper will have the structure of a literature review with clinical examples of reconstruction from ENT and Head and Neck Surgery Department of Coltea Clinical Hospital, Bucharest. Reconstruction methods used in our clinic are regional flaps and biocompatible prostheses in advanced stages. QoL index in our clinic is assessed with questionnaires developed by the European Organization for Research and Treatment of Cancer – EORTC QLQ C30

    Reducing Power Consumption for High-Associativity Data Caches in Embedded

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    Modern embedded processors use data caches with higher and higher degrees of associativity in order to increase performance. A set--associative data cache consumes a significant fraction of the total power budget in such embedded processors. This paper describes a technique for reducing the D--cache power consumption and shows its impact on power and performance of an embedded processor. The technique utilizes cache line address locality to determine (rather than predict) the cache way prior to the cache access. It thus allows only the desired way to be accessed for both tags and data. The proposed mechanism is shown to reduce the average L1 data cache power consumption when running the MiBench embedded benchmark suite for 8, 16 and 32--way set--associate caches by, respectively, an average of 66%, 72% and 76%. The absolute power savings from this technique increase significantly with associativity. The design has no impact on performance and, given that it does not have mis-prediction penalties, it does not introduce any new non-deterministic behavior in program execution

    Reducing Data Cache Energy Consumption via Cached Load/Store Queue

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    High-performance processors use a large set-associative L1 data cache with multiple ports. As clock speeds and size increase such a cache co nsumes a significant percentageo f the to tal pro cesso energy. This paper pro oses a method o saving energy by reducing the number of data cache accesses. It do esso by mo difying the Lo6 /Stoq Queue design to allo w "caching" o prev io sly accessed data valueso nbo h lo ads and sto res after the co rrespo nding memo ry access instruct io has beenco mitted. It is sho wn that a 32-entry mo dified LSQ designallo ws an averageo 38.5%o the loq s in the SpecINT95 benchmarks and 18.9% in the SpecFP95 benchmarks to get their data fro the LSQ. The reductio in the numbero f L1 cache accesses results in upto a 40% reductio n in the L1 data cache energy co nsumptio n and in an upto a 16% impro vement in the energy--delaypro duct while requiring almox no additioal hardware or complex control logic

    Non-cooperative low-complexity detection approach for FHSS-GFSK drone control signals

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    International audienceThe commercial drone market has substantially grown over the past few years. While providing numerous advantages in various fields and applications, drones also provide ample opportunities for misuse by irresponsible hobbyists or malevolent actors. The increasing number of safety/security incidents in which drones are involved has motivated researchers to find new and ingenious ways to detect, locate and counter this type of vehicles. In this paper, we propose a new method to detect frequency hopping spread spectrum - Gaussian frequency-shift keying (FHSS-GFSK) drone communication signals, in a non-cooperative scenario, where no prior information about the signals of interest is available. The system is designed to detect and retrieve data bit sequences through a compressive sampling approach, which includes the extraction of the reduced spectral information and a soft detection algorithm. The performance of the proposed approach is assessed in terms of bit error rate and compared with that of a Viterbi detector and a neural network-based detector. The effectiveness of the method described in the paper highlights the fact that current UAV communications are not infallible and present real security issues

    AMRM Prototype Board Design and Implementation

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    3 Implementation Methodology 4 3.1 FPGA Design and Implementation..............................
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